Paolo Gargini

The ITRS with participation from Europe, Japan, Korea, Taiwan and the US outlined the way towards a fundamental restructuring of semiconductor devices in 1998. The ITRS predicted that Equivalent Scaling (ES) methodology was going to start replacing Geometrical Scaling (GS) in CMOS transistors within 5 years. The Focus Center Research Program (FCRP) was initiated in continue reading →

Erik DeBenedictis

Ph. D. from Caltech 1983. Worked on parallel computers at Bell labs, finite element software at Ansoft corporation, parallel computers at nCUBE. Currently working on “Beyond Moore’s law” research issues at Sandia.

Takashi Matsukawa

Takashi Matsukawa received the B.S., M.S., and Ph.D degrees in electrical engineering from School of Science and Engineering, Waseda University, Tokyo, Japan. In 1998, he joined the Electrotechnical Laboratory, which is former organization of National Institute of Advanced Industrial Science and Technology (AIST). He has been working on development of front-end process technology, variability issues continue reading →

Takafumi Fukushima

Takafumi Fukushima received the B.S., M.S., Ph.D. degrees in Department of Materials Science and Chemical Engineering from Yokohama National University in 1998, 2000, 2003, respectively. From 2001 to 2003, he was a technical advisor at PI R&D Corporation in Yokohama. After that, he worked at Venture Business Laboratory of Tohoku University as a postdoctoral fellow continue reading →

Tadahiro Kuroda

Tadahiro Kuroda received the Ph.D. degree in electrical engineering from the University of Tokyo, Tokyo, Japan, in 1999. In 1982, he joined Toshiba Corporation. From 1988 to 1990, he was a Visiting Scholar with the University of California, Berkeley, where he conducted research in the field of VLSI CAD. In 1990, he was back to continue reading →

Masaharu Kobayashi

Masaharu Kobayashi (M’09) received the B.S. and M.S. degrees in electronics engineering from the University of Tokyo, Tokyo, Japan, in 2004 and 2006, and the Ph.D. degree in electronics engineering from Stanford University, Stanford, CA, in 2010, respectively. He joined the IBM T.J. Watson Research Center, Yorktown Heights, NY, in 2010, where he worked on continue reading →

Tetsuo Endoh

Tetsuo Endoh joined ULSI Research Center Toshiba Co. in 1987 and was engaged in the R&D of NAND Memory. He became a lecturer at the Research Institute of Electrical Communication, Tohoku University in 1995. He is a professor at the Department of Electrical Engineering, the Graduate School of Engineering, Tohoku University and director of the continue reading →

Mangilal Agarwal

Dr. Mangilal Agarwal received his B.E. degree in Electronics and Communication Engineering from Osmania University (Hyderabad, India) in 1998, and the M.S. and Ph.D. in Engineering from Louisiana Tech University (Ruston, LA) in 2002 and 2004, respectively. Upon receiving his Ph.D. degree, he was employed by Louisiana Tech University, as a Postdoctoral Research Associate, followed continue reading →

Senaka Kanakamedala

Senaka Kanakamedala has received M.S. and Ph.D. degrees in engineering from Louisiana Tech University in 2011. He joined Micron Technology after his graduation to work on research and development of 3D X-point memory. His primary focus was to develop advanced chemical mechanical planarization processes for 3D X-point cell. Later, he joined R&D group of SanDisk, continue reading →