About

INC Workshop Overview

The newly reorganized INC covers the technology ecosystem based in nanotechnology and computing and which supports global information technologies. The ecosystem includes devices for computing and communications, computer architecture, and applications. The current workshop focuses on the application areas of deep learning and self-driving vehicles, although future workshops are expected to include applications beyond artificial intelligence.

This small (~60 person) workshop will establish a vision of an integrated future technology “stack” for computers that enable new applications. The workshop will plan for the vision to become part of the IEEE International Roadmap for Devices and Systems (IRDS) and for the research to be presented at conferences such as IEEE’s International Conference on Rebooting Computing.

The first day will have presentations with the second day adding panels and breakout groups. The third day will have facility tours of the nearby universities of Notre Dame and Purdue.

INC’s 12-Year History

In 1998, the International Technology Roadmap for Semiconductors (ITRS) predicted the nanotechnology revolution that came to pass at the beginning of the 21st century. Nanotechnology research programs and capital investments quickly spread around the world. Society benefitted from the complete refurbishment of the MOS device (transistors) and the proliferation of new technologies into computing and communications.

The INC conference was created in 2005, with effort and financial supported from Europe, Japan and the US, to communicate nanoelectronics programs across the three regions. The conferences identified research gaps and led to several cooperative programs under the guidance of the International Planning Working Group on Nanoelectronics (IPWGN).

The rebirth of computing and communications industries over the past 12 years and a transformation of society led to the formation of the Rebooting Computing Initiative (RCI) and the replacement of ITRS with IRDS. These IEEE organizations have embraced the new and broader goals of the new ecosystem of the electronics industry.

These industry changes make it natural for INC’s scope to expand beyond just the nanotechnology at the base of all computing systems and include architecture and software. To keep the scope manageable, INC organizers decided to limit the scope of applications in the upcoming meeting to artificial intelligence.

Background on the New INC Workshop Mission

While society benefitted from the growth of nanotechnology for computers, the benefit came indirectly through products like Word processors, databases, and the Internet. INC organizers believe it is becoming more important to justify ongoing advances in semiconductors in terms of new applications the advances enable.

The US President’s Council of Advisors on Science and Technology refer to applicatios in this way when they recommend [President’s Council of Advisors on Science and Technology, “Ensuring Long-Term U. S. Leadership in Semiconductors,” January 2017. Document includes a table of 14 suggested “moonshots.”] that U.S. policymakers carefully select ambitious challenges, which [they] call ‘moonshots,’ as focal points for industry, government, and academic efforts to drive computing and semiconductor innovation forward together.”

Let us consider future applications in artificial intelligence, specifically deep learning and self-driving vehicles, which correspond to two moonshots in the PCAST report (“Artificial Intelligence and Machine Learning” and “Robotics, Autonomous Systems”).

There are, in fact, roadmap-like projections of moonshots in artificial intelligence, but they are not tied directly to semiconductors (as far as we know).

About a year ago, the AlphaGo deep learning neural network was taught to play “Go,” with the milestone being their success in beating the best human player. The program ran on a Tensorflow (like a custom GPU) cluster, but beating the best human player was the big news [D Silver, David, et al. “Mastering the game of Go with deep neural networks and tree search.” Nature 529.7587 (2016): 484-489] not the energy efficiency of the Tensorflow architecture or baseline CMOS technology.

Similarly, Figure 1 shows milestones in driving automation. Unlike ITRS, the chart is in terms of functional milestones, like whether a human must be present in the car, and not ops/joule or clock rate.

Figure 1: An example of a roadmap for self-driving automobiles (https://www.slideshare.net/AliMaleki2/cti-presentation-48709481)

Achieving the functional milestones depends heavily on Moore’s law-like progress. AlphaGo mentioned above ran on a supercomputer-like cluster that would probably have been prohibitively expensive a decade before (based on hints compute requirements and energy consumption). For vehicle automation, Figure 1 shows the architecture for a representative processor, comprising a System on Chip (SoC) with many hardware and software modules that can be configured to address a whole class of applications.

Figure 2: Representative automotive application processor (http://www.cnx-software.com/2015/12/07/renesas-r-car-h3-deca-core-processor-and-driverless-car-roadmap/)

New INC Workshop Mission and Goals

The background information above shows technology road mapping in an application domain, yet it is all at a “higher level” than the original ITRS’s focus on devices and circuits/subsystems like microprocessors and DRAM.

The workshop’s objective will be to extend the scope of technology projection to encompass important applications, with this meeting trying out the process on just a few applications.

Table 1 is the organizers’ anticipated form of the meeting results. The table is a by-year roadmap in a similar form to figure 1 and to historical ITRS roadmaps if rotated 90 degrees. However, the milestones on the vertical axis are functions, such as “full driver assist” instead of numerical milestones like “45 nm linewidth.” Table 1 includes numerical parameters in the column Power/ops. Thus, we could answer the question “why do we need TFETs” with Table 1 and a device roadmap.

Table 1: Possible form of meeting output

AI Milestone Task Description Power
ops
Technology/ Architecture Year
Driver assist Identify cars in other lane when driver activates turn signal 50W
10x
CPU 2000-2009
Full self-drive Drive car from sensors and visual cues 50W
10y
GPU 20yy (if without accidents)
Fully autonomous mini-robot Plan, move, and carry out missions 10mW
10z
Something new 20zz

Tracks (work in progress)

1. Devices: 3D Power Scaling and Post CMOS

TFET, NegFET, CNT FET, etc… Goal to create a vision for evolution of CMOS into new variants and new device classes that could support architectures and ultimately new applications, specifically focused on AI. This track is expected to include more radical post CMOS devices, such as analog neurons.

2. Communications: G4/5 and Data Centers

TBD

3. Architecture: Digital/analog and Alternatives to the Microprocessor

This track seeks to develop a set of reference architectures suitable for new devices and new applications, specifically focused on AI. Previous INC workshops implicitly assumed devices were targeted at the pre-eminent microprocessor and DRAM memory, with this workshop’s objective to broaden the domain.

4. Applications: Focus on Deep Learning and Self-driving Vehicles (AI)

Deep learning, self-driving vehicles, and other AI applications are rated primarily on their intelligence, which goes beyond speed and energy efficiency of devices and the computer’s architecture. This goal of this track is to identify an intelligence roadmap for each application area and tie it to requirements for the underlying computing system.

Contact

Conference Organizer: Paolo Gargini